Juried Engineering CD74HC4060E 74HC4060 High Speed CMOS Logic 14-Stage Binary Counter with Oscillator (Pack of 5)

Juried Engineering CD74HC4060E 74HC4060 High Speed CMOS Logic 14-Stage Binary Counter with Oscillator (Pack of 5)

Onboard Oscillator, Common Reset, Negative Edge Clocking Fanout (Over Temperature Range) Standard Outputs . . . . 10 LSTTL Loads Bus Driver Outputs . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . –55°C to 125°C Balanced Propagation Delay and Transition Times, High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V Significant Power Reduction Compared to LSTTL Logic ICs, 2V to 6V Operation The ’HC4060 consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition of O). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times.